How Marvell Technology Makes its Money: Revenue Breakdown

How Does Marvell Technology Make its Money?

Marvell Technology (NASDAQ: MRVL) is a semiconductor company specialising in data infrastructure chips — the processors, controllers, networking silicon, and custom accelerators that power data centres, 5G networks, and storage systems. The company generated $6.1 billion in total revenue for fiscal year 2025 (Marvell’s fiscal year ends in January), up 10.9% year-over-year, with GAAP net income of $0.1 billion and a non-GAAP net income of approximately $2.0 billion — the large GAAP/non-GAAP gap being a defining characteristic of Marvell’s financial presentation.

Marvell earns revenue across five end markets: Data Center (62% of revenue, the dominant and fast-growing segment), Enterprise Networking (18%), Carrier Infrastructure (10%), Consumer (5%), and Automotive/Industrial (5%). The 62% data centre weighting — up from 33% just two years prior — tells the strategic story: Marvell has executed a rapid transformation from a diversified infrastructure semiconductor company into an AI data centre focused chipmaker, with data centre revenue more than doubling (+111%) in FY2025.

The central strategic narrative is Marvell’s positioning as a custom AI silicon (ASIC) partner for hyperscalers. Google, Amazon, Microsoft, and Meta are all designing custom AI chips to complement or replace Nvidia GPUs for specific workloads — and Marvell, alongside Broadcom, is one of the primary silicon design partners for these programmes. Marvell’s custom silicon engagements are in various stages of ramp, and the company expects data centre revenue to grow substantially over FY2026–2028 as these programmes scale to production volumes.

Key Takeaways

• Marvell generated $6.1B in FY2025 revenue (+10.9% YoY) but the headline growth understates the transformation: Data Center revenue doubled (+111% to $3.8B) while Carrier Infrastructure collapsed (-53.8%) — the company is mid-transition from a diversified infrastructure chipmaker into an AI data centre specialist
• Custom AI ASICs (application-specific integrated circuits) are the growth engine — Marvell designs purpose-built AI accelerator chips for hyperscale customers (Google TPUs, Amazon Trainium/Inferentia-adjacent programmes, and others) that are fabricated on TSMC’s leading-edge nodes; this is the same market Broadcom dominates, and Marvell is its primary competitor for new hyperscaler ASIC engagements
• Electro-optics and PAM4 DSPs are Marvell’s most defensible technical differentiation — its optical digital signal processors (DSPs) enable the 800G and 1.6T high-speed interconnects that link GPU clusters; as AI training clusters scale to hundreds of thousands of GPUs, optical interconnect bandwidth becomes as critical as the GPUs themselves
• GAAP vs. non-GAAP gap is large and important to understand: GAAP operating margin is ~4.9% and GAAP net income is $0.1B; non-GAAP operating margin is ~32% and non-GAAP net income is ~$2.0B; the $1.9B+ difference is primarily stock-based compensation (~$1.4B) and amortisation of acquired intangibles (~$0.5B) from past acquisitions — both are real economic costs but the non-GAAP view better reflects the underlying business’s cash earnings power
• Carrier Infrastructure (-53.8%) represents the most severe segment decline — telecom operators globally completed the initial 5G capex buildout and are in a multi-year spending trough; this segment was ~24% of revenue in FY2024 and has fallen to ~10%, removing a significant revenue contribution and creating a recovery opportunity when the next wave of telecom infrastructure investment resumes
• Enterprise Networking (-26.7%) declined as corporations digested excess networking inventory purchased during the COVID-era supply chain crunch; this is a cyclical correction, not structural; recovery expected as inventory normalises and AI-driven enterprise network upgrades (for GPU clusters in enterprise settings) drive new demand
• 45,000+ units of installed silicon across data centre, telecom, and enterprise creates a long tail of design wins that generate multi-year revenue streams; Marvell’s chip designs, once integrated into a customer’s system architecture, are typically retained for the 3–5 year life of that platform
• The custom silicon TAM (total addressable market) for hyperscaler ASICs is projected to reach $100B+ by 2027 according to industry estimates; Marvell’s disclosed pipeline of hyperscaler engagements positions it for revenue that is currently invisible in reported numbers but represents the bull case for the stock

Marvell Technology (MRVL) Business Model

Marvell’s business model is a fabless semiconductor design company focused on data infrastructure — it designs complex chips but outsources fabrication to TSMC and other foundries. Revenue comes from selling those chips to OEMs, cloud providers, and system integrators who incorporate them into servers, network switches, storage arrays, base stations, and AI accelerator systems.

The Fabless Model and Marvell’s R&D-Intensive Economics

As a fabless chipmaker, Marvell’s primary assets are intellectual property and engineering talent rather than manufacturing equipment. Its cost structure is:

• Cost of Revenue (~54% of revenue): The wafer cost paid to TSMC and other foundries, plus packaging, testing, and logistics. Marvell’s chips are manufactured on leading-edge TSMC nodes (N5, N3) for AI silicon and trailing-edge nodes for legacy products
• R&D Expense (~30%+ of revenue): The dominant operating expense — thousands of chip designers working on custom ASIC programmes, networking silicon, electro-optics, and next-generation platform development
• SG&A (~7% of revenue): Sales, marketing, and administrative costs; lower than most comparable companies due to concentrated customer base (hyperscalers and large OEMs) requiring fewer salespeople than a broad enterprise customer base
• Stock-Based Compensation (~23% of revenue): Very high by semiconductor industry standards, reflecting Marvell’s need to attract and retain elite chip designers who have competing offers from Nvidia, Apple, Broadcom, and hyperscaler internal silicon teams

The non-GAAP view (excluding SBC and intangible amortisation) reveals a business with ~62% gross margins and ~32% operating margins — comparable to the best-in-class fabless semiconductor companies.

Custom AI Silicon (ASICs): The Core Growth Driver

The most important part of Marvell’s business to understand in 2024–2026 is its custom AI ASIC programme.

What are custom AI ASICs? Hyperscale cloud providers (Google, Amazon, Microsoft, Meta) have concluded that general-purpose AI accelerators (Nvidia GPUs) are not optimal for every AI workload and are too expensive to rely on exclusively. These companies are investing billions to design their own custom AI chips — Application-Specific Integrated Circuits (ASICs) — purpose-built for their specific model architectures and inference/training workloads.

• Google: Tensor Processing Units (TPUs), now in the 6th generation (Trillium); Google uses TPUs heavily for training and inference
• Amazon: Trainium (training) and Inferentia (inference) chips used in AWS
• Microsoft: Microsoft Maia AI accelerators, announced in 2023
• Meta: MTIA (Meta Training and Inference Accelerator)

Where Marvell fits: Marvell does not design these chips from scratch — the hyperscaler defines the architecture. Marvell provides:

1. Die design services and chiplet integration: Engineering teams that translate the hyperscaler’s architectural requirements into manufacturable silicon, managing the complex layout, power delivery, and signal integrity of leading-edge chips
2. SerDes (Serialiser/Deserialiser) IP: Critical interconnect intellectual property that enables high-speed data transfer between chiplets, between chips, and between servers — Marvell’s SerDes IP is embedded in many custom AI chips
3. Custom networking silicon: The switching and interconnect chips that connect AI accelerators within a cluster — not the accelerator itself but the fabric connecting them
4. Optical DSPs and electro-optics: The interface between electrical signals and optical fibres — increasingly critical as AI clusters communicate over optical interconnects at 800G and 1.6T speeds

The ASIC revenue model: Custom silicon programmes take 2–4 years from engagement to production revenue. During development, Marvell earns engineering services fees (relatively small). When the chip reaches production and the hyperscaler begins deploying it at scale, Marvell earns per-unit chip revenue — potentially billions of dollars over the 3–5 year production life of the platform. Marvell has disclosed multiple active hyperscaler ASIC engagements at various stages; the market is extrapolating from these disclosures to estimate the future revenue ramp.

Electro-Optics: The Interconnect Bandwidth Problem

As AI training clusters have scaled from thousands to hundreds of thousands of GPUs, the bandwidth connecting those GPUs has become as important as the GPUs themselves. A bottleneck in inter-GPU communication wastes GPU compute capacity — an expensive problem when GPU clusters cost hundreds of millions of dollars.

Marvell’s PAM4 DSP (Pulse Amplitude Modulation 4-level Digital Signal Processor) chips are the primary interface between the electrical world of GPU servers and the optical fibre world of high-speed interconnects. Every optical transceiver module running 400G, 800G, or 1.6T data rates in a leading-edge AI data centre requires a PAM4 DSP.

Marvell is a leading supplier of PAM4 DSPs and has been shipping 800G DSPs into AI data centre deployments. The roadmap extends to 1.6T — as AI clusters demand more bandwidth, each new generation of optical transceiver requires a new Marvell DSP. This creates a technology-led upgrade cycle that is relatively independent of custom ASIC programme timing.

Co-packaged optics (CPO) is the next phase — integrating optical components directly into the switch or GPU package rather than in separate pluggable transceiver modules. Marvell is investing in CPO technology, which would further entrench its position in the optical interconnect supply chain if adopted at scale.

The Legacy Business: Enterprise, Carrier, and Storage

Marvell’s non-data-centre segments represent the historical company before the AI pivot:

Enterprise Networking: Ethernet switches, physical layer (PHY) chips, and network controllers for enterprise campuses and branch offices. Marvell’s Prestera switching silicon and Alaska PHY products are embedded in networking equipment from major OEMs. This segment is in cyclical recovery from the 2023–2024 inventory correction.

Carrier Infrastructure: Chips for 5G base stations — baseband processors, fronthaul/backhaul interfaces, and timing chips. Marvell was a significant 5G silicon supplier (particularly OCTEON DPU processors for baseband units). The severe decline (-53.8% in FY2025) reflects telecom operator capex fatigue post-5G buildout. A recovery in 6G-related infrastructure investment (expected mid-decade) could reactivate this segment.

Storage: Hard disk drive (HDD) controllers and solid-state drive (SSD) controllers. Marvell is the dominant supplier of enterprise HDD controllers (virtually every enterprise-class HDD uses Marvell silicon) and competes in the SSD controller market. Storage is a slow-growth, stable business that provides steady revenue independent of AI cycle timing.

Consumer: Smaller consumer electronics storage and networking applications. Low-growth and de-emphasised under Marvell’s AI pivot strategy.

Marvell Technology Competitors

Broadcom — primary custom ASIC competitor

Broadcom is Marvell’s most important competitor in the custom AI ASIC market. Broadcom has longstanding relationships with Google (the primary customer for its custom silicon business) and is the larger and more established ASIC design partner. Broadcom’s ASIC business is estimated to generate $10B+ annually and is growing rapidly. Marvell is pursuing similar engagements with Amazon, Microsoft, Meta, and others — the two companies are the primary choices hyperscalers consider when selecting an ASIC design partner. Broadcom is significantly larger overall (~$51B in revenue vs. Marvell’s $6.1B) and more diversified, but in the custom silicon market specifically the competition is direct.

Nvidia — the GPU incumbent that custom ASICs aim to displace

Nvidia is not a direct Marvell competitor in the same product categories — Nvidia makes GPU accelerators; Marvell makes networking silicon and custom ASIC infrastructure. However, Nvidia is the indirect competitive context: hyperscalers building custom ASICs with Marvell/Broadcom are explicitly doing so to reduce Nvidia GPU dependence and cost. Marvell benefits when hyperscalers invest in custom silicon; Nvidia would prefer they buy more H100s and B200s. Additionally, Nvidia competes with Marvell in data centre networking through its Mellanox/InfiniBand networking business — competing with Marvell’s Ethernet switching and electro-optics silicon for data centre interconnect.

Qualcomm — infrastructure semiconductor overlap

Qualcomm competes with Marvell in some carrier infrastructure segments (5G base station chips) and has been pursuing data centre opportunities. The overlap is less direct than Broadcom — Qualcomm’s primary business is mobile processor and modem SoCs, not data centre custom silicon. The primary competitive relevance is in 5G infrastructure silicon where both companies have competed for baseband and networking chip design wins.

Intel (Altera/Agilex FPGAs) — programmable silicon alternative

Intel’s FPGA business (Altera, now being spun out) offers programmable alternatives to fixed-function ASICs for certain workloads. Hyperscalers evaluating whether to use FPGAs vs. custom ASICs for a given workload effectively choose between Intel FPGAs and Marvell/Broadcom ASIC design services. For very large volume deployments where performance optimisation justifies the long development cycle, custom ASICs win over FPGAs.

Coherent, II-VI (now Coherent Corp.) — electro-optics competition

In the PAM4 DSP and electro-optics segment, Marvell competes with Coherent and other optical component suppliers. The competitive dynamics in optical DSPs involve both technology leadership (higher data rate capability, lower power consumption) and supply relationships with transceiver module manufacturers.

Revenue Breakdown

Financial data sourced from Marvell Technology SEC Filings.

The revenue mix shift is the defining story: Data Center grew from 33% of FY2024 revenue to 62% of FY2025 revenue — a fundamental reweighting of the business in a single year. The non-data-centre segments (Enterprise, Carrier, Consumer, Auto) collectively declined $1.4B while Data Center grew $2.0B, producing the modest +10.9% overall growth. In FY2026–2027, if Data Center continues growing rapidly while legacy segments recover cyclically, the revenue growth rate should accelerate materially.

Revenue Trend (3-Year)

FY2023 was Marvell’s prior peak cycle — strong carrier infrastructure spending (5G buildout) and enterprise networking combined with early data centre growth. FY2024 declined as carrier and enterprise markets corrected simultaneously. FY2025 recovered on data centre strength despite the legacy market headwinds. The non-GAAP operating margin range of 27–33% is the most relevant measure of underlying business profitability — it has remained consistently above 25% across the cycle, demonstrating genuine operating leverage in the business model.

Marvell Technology (MRVL) Income Statement

Financial data sourced from Marvell Technology SEC Filings.

Marvell Technology (MRVL) Key Financial Metrics

• GAAP Gross Margin: 45.9% / Non-GAAP: ~62% — The GAAP gross margin (45.9%) includes stock-based compensation allocated to cost of revenue; the non-GAAP gross margin (~62%) excludes SBC and intangible amortisation. The non-GAAP view is more comparable to fabless semiconductor peers like Broadcom (~65% gross margins). The improving trend (from 41.8% in FY2024 to 45.9% in FY2025 on GAAP basis) reflects data centre mix shift — high-value custom silicon and electro-optic products carry higher gross margins than the legacy carrier/consumer products

• GAAP Operating Margin: 4.9% / Non-GAAP: ~32% — The ~27 percentage point gap between GAAP and non-GAAP operating margin is the defining financial characteristic of Marvell. The primary drivers: (1) Stock-based compensation: ~$1.4B annually — extremely high as a percentage of revenue (~23%) due to the competitive market for senior chip design engineers; (2) Amortisation of acquired intangibles: ~$500M — accounting charge from past acquisitions (Inphi for $10B in 2021, Innovium for $1.1B in 2021, Cavium for $6B in 2018) that depresses GAAP earnings for years after acquisition. Neither of these is a cash cost in the current period, which is why non-GAAP metrics better represent cash earnings power

• Free Cash Flow: Non-GAAP operating income (~$2B) less capex (~$200M) gives a rough FCF of ~$1.8B — substantial relative to the $70B market cap. GAAP cash flow from operations is lower due to working capital movements. Marvell uses FCF for share buybacks and to fund ongoing R&D

• Stock-Based Compensation: ~$1.4B (23% of revenue) — among the highest SBC ratios in semiconductors; necessary to compete for talent against Nvidia (where RSU values have been exceptional), Apple (the largest employer of chip designers), and hyperscaler internal silicon teams (Google, Amazon, Microsoft all pay extremely competitively for chip architects). SBC is the primary reason GAAP and non-GAAP metrics diverge so dramatically

• Data Center Revenue Growth: +111% — the single most important growth metric. Sustaining any significant fraction of this growth rate in FY2026 and beyond (even 30–40% data centre growth) would drive substantial total revenue acceleration given data centre’s 62% revenue share

• Custom Silicon Backlog and Pipeline: Marvell has disclosed engagements with multiple hyperscale customers at various stages (design, tape-out, qualification, production). The production revenue from programmes currently in design is not yet reflected in reported revenue — this is the key source of upside in analyst models

Is Marvell Technology Profitable?

On a GAAP basis: barely. Marvell reported GAAP net income of $0.1 billion on $6.1 billion in revenue — a 1.6% GAAP net margin and 4.9% GAAP operating margin. This is positive but not meaningfully so, and the company reported a GAAP net loss in FY2024.

On a non-GAAP basis: strongly. Non-GAAP net income was approximately $2.0 billion — a ~33% non-GAAP net margin that would rank among the most profitable fabless semiconductor companies. The non-GAAP view, which excludes stock-based compensation and intangible amortisation, represents the underlying cash earnings power of the business.

The honest assessment is that both views are partly true: the GAAP losses are real economic costs (SBC is genuine dilution to shareholders; intangible amortisation represents past acquisition premiums that needed to be economically justified). But the non-GAAP margins are also genuinely informative — the engineering and chip design business itself is highly profitable, and the SBC level reflects the cost of maintaining the engineering talent that generates those returns. Evaluating Marvell requires holding both frameworks simultaneously.

Marvell Technology (MRVL): What to Watch

1. Custom AI ASIC production ramp disclosures — Marvell’s most important quarterly communication is any update on hyperscaler custom silicon programmes entering production. Management has disclosed multiple engagements at different stages (design → tape-out → qualification → production). Each programme that moves into production volume adds hundreds of millions to billions in annual revenue. Watch earnings calls for any language on programme milestones, customer count, or production revenue timeline — this is the primary determinant of the bull/bear case for the stock

2. Data Centre revenue growth rate trajectory — FY2025 data centre revenue grew 111%; the question for FY2026 is not whether it grows but at what rate. Consensus expects continued strong growth driven by custom ASIC ramp and electro-optics volume. Any deceleration below 40–50% data centre growth in FY2026 would be a significant downward catalyst; acceleration above 60% would be a major positive. Watch quarterly data centre revenue segments vs. sell-side expectations

3. Carrier Infrastructure recovery timing — The 5G capex trough is eventually followed by recovery. Leading indicators include: AT&T, Verizon, and T-Mobile capex guidance; global telecom operator commentary on infrastructure spending; and any announcements around 5G Advanced (5.5G) or early 6G infrastructure planning. A carrier recovery adds $600M+ to Marvell’s revenue base from a depressed FY2025 baseline — a significant incremental contribution when it arrives

4. Enterprise Networking recovery and AI enterprise networking — Beyond the cyclical inventory recovery, there is a structural opportunity: enterprises building private AI infrastructure (on-premise GPU clusters for inference and fine-tuning) need upgraded high-speed Ethernet networks. Marvell’s Ethernet switching and PHY silicon could benefit from enterprise AI networking investment independent of the traditional enterprise campus refresh cycle. Watch enterprise networking revenue in FY2026 for signs of both cyclical recovery and AI-driven demand

5. Electro-optics 800G and 1.6T ramp — PAM4 DSP revenue grows with each new generation of optical transceiver deployment. The industry is mid-transition from 400G to 800G, with 1.6T on the horizon. Watch Marvell’s electro-optics revenue growth rate and any announcements about 1.6T design wins or sampling as indicators of technology leadership maintenance in this segment

6. GAAP profitability trajectory — SBC intensity at 23% of revenue is unsustainably high as a percentage for long-term investors focused on GAAP returns. Watch whether SBC grows slower than revenue (declining as a percentage) — if revenue scales substantially while SBC remains roughly flat in absolute terms, GAAP margins improve dramatically. Management’s trajectory on this metric indicates whether the company can convert non-GAAP profitability into GAAP profitability over time

7. Co-packaged optics (CPO) adoption — CPO integrates optical components directly into the switch package, eliminating pluggable transceivers. If CPO becomes the standard (which Marvell and others believe it will for hyperscale AI data centres in the 2026–2028 timeframe), companies with strong CPO technology get designed into the foundational architecture of next-generation AI clusters. Watch for any hyperscaler CPO deployment announcements and Marvell’s position in those programmes

Marvell Technology (MRVL) Financial Summary

Marvell Technology (MRVL) generated $6.1 billion in total revenue in fiscal year 2025 (+10.9% YoY) — a headline that understates the transformation: Data Center revenue more than doubled (+111% to $3.8B) while legacy segments (Carrier, Enterprise) declined sharply, reflecting Marvell’s rapid pivot toward AI data centre custom silicon and electro-optics. GAAP net income was $0.1B (thin due to $1.4B in SBC and $500M in intangible amortisation); non-GAAP net income was approximately $2.0B — revealing a highly profitable underlying semiconductor business.

The investment thesis is a direct bet on the hyperscaler custom AI silicon market: as Google, Amazon, Microsoft, and Meta scale their custom chip programmes, Marvell’s ASIC design partnerships, SerDes IP, and optical interconnect silicon position it to capture a meaningful and growing share of a TAM projected to reach $100B+ by 2027. The competitive positioning alongside Broadcom makes Marvell one of two primary winners of the custom silicon opportunity. For GPU context, see How Nvidia Makes its Money.